
9
Confidential
171717
ARM7TDMI Processor
§
Architecture v4T
§
3-stage pipeline
§
Single interface to memory
181818
ARM926EJ-S Processor
ARM926EJ-S
§
Architecture v5TE
§
5-stage pipeline
§
Single-cycle 32x16 multiplier
§
Caches and TCMs
§
Memory management unit (MMU)
§
2 AHB memory interfaces
§
Jazelle technology
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