ARM VERSION 1.2 Ficha de datos descargar pdf (Pagina 145)

Semihosting

Multi-ICE handles the semihosted SWI and then examines the contents

of lr and returns to the instruction following the SWI instruction in your

code.

Regardless of the value of

$vector_catch

, all exceptions and interrupts are

trapped and reported as an error condition.

For details of how to modify debugger internal variables, see the appropriate debugger

documentation.

5.2.5 Multi-ICE DCC semihosting

Multi-ICE can also use the debug communications channel so that the core is not

stopped while semihosting takes place. This is enabled by setting

$semihosting_enabled

to 2. Refer to the Multi-ICE User Guide for more details.

1 2 ... 140 141 142 143 144 145 146 147 148 149 150 ... 175 176

Sin comentarios

ARM VERSION 1.2 Ficha de datos Pagina 145